Power integrity design in PCB circuit
Author:Lin fengxiu Time:2021-06-09 17:59 Browse(682)
Power integrity design in PCB circuit, touch screen and OLED Forum
In circuit design, we are generally concerned about the quality of the signal, but sometimes we are limited to the research on the signal line, and treat the power supply and ground as the ideal situation. Although this can simplify the problem, in high-speed design, This simplification is no longer feasible.
although the direct result of circuit design is shown in terms of signal integrity, we must not ignore the power integrity design.

Power integrity design in PCB circuit

because power integrity directly affects the signal integrity of the final PCB.
power integrity and signal integrity are closely related.
and in many cases, power integrity and signal integrity are closely related, The main factors that affect the signal distortion are the power supply system.
for example,
the ground bounce noise is too large, the design of decoupling capacitor is inappropriate, the influence of circuit is very serious, the division of multi power supply / ground plane is not good, the stratum design is unreasonable, the current is not uniform, and so on.
in this paper, the main factors that affect the signal distortion are analyzed0 K1 s; G9 N+ B                                                                              .* }" @& f6 }7 i1 e; { 1 ^$ b    R4 x 1) power distribution system. l6 Z.
h7 T. q+ b5 D; L%The integrity design of power supply is a very complex thing, but how to control the impedance between power supply system (power supply and ground plane) is the key to the design in recent years.
in theory.
the lower the impedance between power supply systems, the better, the lower the impedance and the smaller the noise amplitude, The smaller the voltage loss is.
in the actual design, we can determine the target impedance we want to achieve by specifying the maximum voltage and power variation range.
in the actual design, we can determine the target impedanceThen, by adjusting the relevant factors in the circuit, the target impedance of each part of the power system (related to frequency) is approximated1 ^# O: G: h9 `( D. {. w* [% G) L' A    V + C9 M 2)0 N8 l% | '[3 L / Q # K3 X6 Q when the edge rate of high-speed devices is lower than 0.5 ns.
the data exchange rate from the high-capacity data bus is very fast, and when it produces strong ripple in the power layer that can affect the signal, it will cause the problem of power instability.
when the current through the ground loop changes.
because the loop inductance will produce a voltage, when the rising edge is short, When the current change rate increases, the ground bounce voltage increases.
at this time.
the ground plane (ground) is not the ideal zero level, and the power supply is not the ideal DC potential.
when the gate circuit of the switch increases at the same time.
the ground bounce becomes more serious.
for the 128 bit bus.
there may be 50_ When 100 I / O lines are switched at the same clock edge.
at this time,
the inductances of the power and ground loops fed back to the I / O drivers that are switched at the same time must be as low as possible, otherwise, a voltage brush will appear when they are still connected to the same ground.
ground bounce can be seen everywhere.
for example, ground bounce may occur on chips, packages, connectors or circuit boards, This leads to the problem of power integrity.
in this paper, the power supply integrity is analyzed    g# ?    o$ E; m    f: RFrom the perspective of technology development,
the rising edge of the device will only decrease and the width of the bus will only increase.
the only way to keep the ground bounce acceptable is to reduce the power and ground distributed inductance. chip, it means to move to an array chip, place power and ground as much as possible, and the connection to the package is as short as possible to reduce inductance.
for.
package, it means to move the layer package to make the distance between the ground planes of power supply closer, For example, it is used in BGA package.
for connector.
it means to use more ground pins or redesign connector to have internal power supply and ground plane, For the circuit board,
means to make the adjacent power supply and ground plane as close as possible.
because the inductance is proportional to the length.
making the power supply and ground connection as short as possible will reduce the ground noise.
0 Y0 Q%+ N! ^3) decoupling capacitance:]) x /].
]) G9 l% D, CWe all know that adding some capacitors between the power supply and the ground can reduce the noise of the system, but how many capacitors are added to the circuit board? What is the appropriate capacitance value of each capacitor? Where is the best position for each capacitor? In high-speed design, we must consider the parasitic parameters of capacitors, and calculate the number of coupling capacitors, the capacitance value of each capacitor and the specific location of each capacitor quantitatively, so as to ensure that the impedance of the system is within the control range, One of the basic principles is that there should be no less decoupling capacitors, and no redundant capacitors.
more information about PCB can be shared on the official website of jiepei.
welcome to learn!4 ^( S    S. ~5 c1 m6 [" V7 Q. q8 H" X3 Q. o, m.
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