How to enhance ESD function in PCB design
Author:wusky Time:2021-06-08 16:50 Browse(872)
How to enhance ESD function in PCB design, touch screen and OLED Forum
In the design of PCB, anti ESD Design of PCB can be realized by layering, proper layout and wiring and installation.

How to enhance ESD function in PCB design

in the design process.
most of the design modifications can be limited to the increase or decrease of components by prediction.
ESD can be well prevented by adjusting PCB layout and wiring.
the following are some common preventive measures.
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W% v# n1 L# Z+ mAs far as possible, multi-layer PCB is used. Compared with double-sided PCB, the ground plane, power plane, and closely arranged signal line ground spacing can reduce the common mode impedance and inductive coupling to 1 / 10 to 1 / 100 of double-sided PCB.
as far as possible, each signal layer is close to a power layer or ground layer.
for the top and bottom layers, there are components and components For high density PCB with very short connection lines and many filling grounds, inner layer lines can be considered/ y. F1 g8 ^& T& P9 X* b" V# I) K' K.
U, pFor double-sided PCB, closely interweaved power and ground grids should be used.
the power line should be close to the ground wire.
between the vertical and horizontal lines or the filling area, as much as possible should be connected.
the grid size of one side should be less than or equal to 60mm.
if possible, the grid size should be less than 13mm.
for double-sided PCB, the grid size should be less than 60mm2 {6 ~. q5 b7 L9 D" @.
e. t& T" Q- P: B5 ?) LMake sure that each circuit is as compact as possible.
all circuits are compact as possible1 s! _$ S3 i* v4 O5 N#R # A / C1 ^ 6 u put all the connectors aside as far as possible.
all the connectors should be put aside as far as possible. \    H" F& w.
U- q4 ~; U # U "s # J6 o 'W1 s if possible, lead the power cord from the center of the card and away from the area easily affected by ESD) u9 w2 v7 O# y- B* e! } 7 i- ~) t4 y+ oOn all PCB layers under the connectors leading out of the chassis (easily hit by ESD).
place a wide chassis floor or polygon filled floor, and connect them with vias every 13mm.
! O# s8 ^: Q3 s" n( S) y3 D8 ~    M& E) O9 i2 s4 l9 k3 y       Place mounting holes on the edge of the card.
around the mounting holes, connect the top and bottom pads of the non blocking flux to the chassis ground.
the mounting holes are connected to the chassis ground: ~. c3 l' ?$ R.
v: D: tWhen assembling Z6 C PCB, do not apply any solder on the top or bottom pad.
use screws with built-in washer to achieve close contact between PCB and metal chassis / shielding layer or bracket on ground plane.
'l1 Y1 |. J. h) | / n- A1 Q$ {6 s- m6 o) V$ oThe same "isolation area" should be set between the chassis ground and the circuit ground of each layer; If possible, keep the separation distance at 0.64mm.
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|* F! R7 H6 A2 S $} 0 E0 o connect the chassis ground and the circuit ground with 1.27mm wide wires every 100 mm along the chassis ground wire at the top and bottom layers of the card near the mounting holes.
adjacent to these connection points.
place pads or mounting holes for installation between the chassis ground and the circuit ground.
these ground wire connections can be cut with a blade to keep open circuit, Or use the magnetic bead / high frequency capacitor to jump.
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x $B3 U   Q6 F) W) x% a$ wIf the circuit board will not be placed in the metal chassis or shielding device, solder resist should not be applied on the ground wires of the top and bottom chassis of the circuit board, so that they can be used as the discharge electrodes of ESD arc.
the results show that the solder resist can not be applied on the ground wires of the top and bottom chassis of the circuit board& c' b' J0 n- J        Set a ring ground around the circuit in the following ways: - I: O (S3 J. {1 A; O. c$ L4 f. f$ X9 n: q& g' t9 N(1) in addition to the edge connector and chassis ground.
put a ring ground path around the whole periphery8 Q- n.
J2 u" ]- A: e& {) a" l% l8 E/ \$ r(2) ensure that the annular ground width of all layers is greater than 2.5mm& `; S/ B4 c$ \% [.
`. q; g3 ^. C'm% H5 Z "t't (3) is connected annularly with vias every 13mm. |# i9 t. T% ^# ^2 z; x! _. o9 `5 c.
X* r7 z4 w9 e, l    K (4) connects the ring ground with the common ground of the multilayer circuit.
k (4) connects the ring ground with the common ground of the multilayer circuit" G6 i; } 9 H4 {5 N2 n3 K7 W5 V:]: J6 V) B.
U (5) for the double-sided board installed in the metal chassis or shielding device, the ring ground should be connected with the circuit common ground.
for the unshielded double-sided circuit, the ring ground should be connected to the chassis ground.
the ring ground should not be coated with solder resist, so that the ring ground can act as the ESD discharge rod, At least one 0.5mm wide gap should be placed at a certain position on the ring ground (all layers), so as to avoid forming a large loop.
the distance between the signal wiring and the ring ground should not be less than 0.5mm.
more specifications are available www.jiepei.com/G1010 ( s) f: v& P/ @/ v' C& q! b) ]. \/ \8 |6 G" r. e1 X( a- ^0 c- x+ H! | 0 @2 Q.
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